S2C customers can now buy DDR2 and DDR3 Prototype Ready IP that work with S2C’s 4th generation S4 TAI logic module. The Prototype Ready IPs enable customers to have out-of-box 2GBytes of DDR2 SDRAM operating at up to 533Mbps or 2GBytes of DDR3 SDRAM operating at up to 800Mbps on S2C’s S4 TAI logic module.

The DDR2 and DDR3 Prototype Ready IPs utilize Altera's External Memory Interface Solutions. They are very useful reference designs to speed up building SoC prototyping because usually ASIC oriented memory controller hardly achieved such high performance on FPGA. S2C’s goal is to ensure that customers can first get their SoC prototypes with DDR2 and DDR3 external memory up and running in shortest possible time with Altera’s supplied memory controllers.

“Running DDR2 and DDR3 at high-performance on FPGAs is not easy and if not engineered properly can lead to poor and unstable system performance. S2C’s DDR2 and DDR3 Prototype Ready Kits are pre-engineered to eliminate these potential problems,” said Mon-Ren Chene, S2C’s Chairman and CTO.

V6 TAI Logic Module is S2C’s fourth-generation rapid SoC prototyping tool based on Xilinx’s 40-nm Virtex-6 FPGA. The V6 TAI Logic Module is equipped with either one or two Virtex-6 XC6VLX760 or XC6VLX550T FPGAs. The Dual 6V760 TAI Logic Module supplies up to 15.2 million ASIC gates of capacity and provides 1,280 external I/O connections. Multiple TAI Logic Modules can be stacked or mounted on a interconnect mother board to meet even larger gate count needs.

S2C’s 4th generation logic modules have many significant improvements over the third-generation product. In addition to more than doubling the logic and memory capacity that can fit on single board, the new TAI Logic Module facilitates much higher system prototype performance and reliability through enhanced power management, clock management, cooling mechanisms and noise shielding. All V6 TAI Logic Modules adopt a similar form factor to all previous TAI Logic Module generations.

Currently, customers can get the Dual V6-760 TAI Logic Module within 4 weeks after placing orders. Please check with S2C sales representatives to get the latest lead time and quotation.

C*Core Technology, a leading 32-bit RISC CPU IP provider, has selected S2C's FPGA prototyping tools to build and deliver its CPU reference designs. The C*Core CPU reference design uses S2C’s fourth generation S4 TAI Logic Modules, which supports Altera’s largest Stratix-4 FPGA devices. Design teams can easily integrate a large number of IP blocks with C*Core CPU for designs of up to 30 million ASIC gates.

“A robust prototyping environment is one of the critical factors to enable design teams to shorten development times in deploying first-class products with C*Core processors," said Joe Xiao, President of C*Core Technology. “We have adopted S2C’s S4 TAI Logic Module as the FPGA platform for our CPU reference design because S2C is known for delivering high reliability products and has an excellent suite of tools to enable rapid SoC prototyping. S2C also has a reputation of providing excellent customer support.”

S2C announced a partnership with Allegro DVT to distribute Allegro DVT’s products in China. Allegro DVT is a leading provider of H.264/MPEG-4 AVC/SVC/MVC solutions, including industry standard compliance test suites and H.264 encoding and codec VHDL IPs.

“Allegro DVT products have been chosen by more than 100 major IC providers, OEMs and broadcasters including Broadcom, Intel, LG, STMicroelectronics, and Trident. In China, several leading design companies have already adopted Allegro DVT solutions including Hisilicon, NationalChip and Spreadtrum” said Pierre Marty, CEO of Allegro DVT. “With S2C’s rich experience in the SoC design industry and strong technical support team, we are excited to work with S2C to market and support our robust high definition video products in China.”