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S2C Verification Module Video Presentation
2011.08 | Ashok Kulkarni |
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This presentation was created in August 2011 by Ashok Kulkarni, Director of Applications Engineering, S2C Inc. The presentation gives an overview of the Verification Module, 3 demos to show the versatility of the Verification Module and a summary. The S2C S4 TAI Verification Module (VM) provides three usage modes: Verification Mode, Debug Mode and Logic Mode. The Verification Mode enables the transfer of large amounts of data from/to a PC through a x4-lane PCIe Gen2 interface using SCE-MI or customizable C-API. In the Debug Mode, the S4 TAI VM enables simultaneous debugging of multiple FPGAs using Altera SignalTap with user’s RTL net names. The user can prototype a design with capacity up to 3.6M gates in the Logic Mode. All debug and verification setup for the VM is done in the TAI Player Pro software.
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