White Papers

Read the following whitepapers to further understand the different applications of S2C technology used by our customers and partners.

Exercising H.264 Video Compression IP Using Commercial FPGA Prototypes

Increasingly silicon IP vendors are utilizing FPGA prototypes as the vehicles for both pre-sales and post-sales support of their IP cores. FPGA prototypes facilitate IP vendors to allow their potential customers to see and evaluate their IP securely at near real-time speed. The FPGA prototype also can serve as a reference design for customers to speed up their design process after the IP transaction is complete. This whitepaper describes how CAST has selected S2C’s TAI Logic Module, a commercial FPGA prototyping tool, to build their H.264 Encoder IP demonstration platform.

A Multi-FPGA Based Platform for emulating a 100M-transistor-scale Processor with High-speed Peripherals

This published paper describes how Institute of Computing Technology (ICT), Chinese Academy of Science used S2C Dual Virtex-5 TAI Logic Modules to prototype a 100 million transistor-scale processor at 25MHz to boot unmodified operating system for carrying out a variety of architectural explorations. The paper identified several key challenges when prototyping a complex design onto multiple FPGA devices and how the ICT research engineers were able to solve these challenges including FPGA partitioning, pin limitations, emulating high-speed IO and debugging the design on S2C’s TAI Logic Module.

Design SoC using FPGA-based IP – An FPGA-Based SoC Design Methodology

SoC design methodology has greatly matured over the past decade and many obstacles have been solved by improved semiconductor technologies, better EDA tools, and new design Servicess. Also thanks to the rapid development of silicon IP industry, designers today can buy most of the design blocks required in an SoC in the market. Nevertheless, putting these IP blocks in an optimal way becomes a key issue, especially when we need to consider system level issues such as performance, bandwidth and power. Moreover, as software content for an SoC continues to enlarge, the ability to co-design software and hardware early becomes a necessity. This whitepaper describes a design methodology that utilizes FPGA-based IP models to create early system prototypes at near real-time speed that allow early software and hardware co-design. Be the first one to the market with the right SoC product by adopting the FPGA-based electronic system level (ESL) methodology.