IP Porter – FPGA-Based SoC Design Design Platform

IP Porter is the world's first FPGA-Based SoC Design design platform facilitating system design using TAI IP – an FPGA-Based SoC Design methodology. The IP Porter system includes TAI-compliant FPGA prototyping hardware and S2C Navigator software that configures system design using TAI IP. IP Porter links to SystemC and other standard ESL tools through SCE-MI and C-API.

Benefits

• Scalable large capacity system
  • Single system holds 3M user ASIC gates
  • 20Mbits FPGA internal memory and up to 1GB of built-in SDRAM
• Small form factor and high performance

• USB2.0 interface for design downloading and debugging
• Intuitive and integrated software flow
  • Compile Verilog and VHDL
  • Embedded automatic partition engine

• Powerful debugging capabilities
  • Integrated Logic Analyzer
  • Link with standard RTL Simulators
  • Vector Mode testing
  • Embedded symbols in TAI IP enable system level debugging without detailed knowledge of IP
• Cost-effective replicates for software development