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  • Power Modules

    Provide up to 200A current for FPGA core and 40W power for FPGA I/O

    Gigabit Ethernet port

    Enables TAI Logic Module control from PC through Ethernet

    USB port

    Enables TAI Logic Module controls from PC through USB

    LM Controller

    Enables real time functions of TAI Logic Module such as clock, download and self-test

    Advanced Clock Management

    Supports 14 global clocks from 2 oscillator sockets, 6 pairs of SMB clock inputs, 6 pairs of programmable clock sources and 6 pairs of feedback clocks from any of the four user FPGAs

    GTX I/O Connectors

    Each Virtex-7 2000T FPGA has 8 Gigabit Transceivers on one GTX I/O connector with a total of 32 Gigabit Transceivers on one board

    Xilinx Virtex-7 2000T FPGA

    Four 28nm FPGA devices provide up to 80M gates and 180M bits of memory on one board

    Xilinx Virtex-7 2000T FPGA

    Four 28nm FPGA devices provide up to 80M gates and 180M bits of memory on one board

    Powerful User I/Os

    120 Single-ended or LVDS I/Os. I/O Voltage individually adjustable connector-wise to 1.2V, 1.5V or 1.8V through software

    Powerful User I/Os

    120 Single-ended or LVDS I/Os. I/O Voltage individually adjustable connector-wise to 1.2V, 1.5V or 1.8V through software

    Voltage Status LED

    Indicate the voltage of deicated I/Os

    Xilinx Virtex-7 2000T FPGA

    Four 28nm FPGA devices provide up to 80M gates and 180M bits of memory on one board

    Xilinx Virtex-7 2000T FPGA

    Four 28nm FPGA devices provide up to 80M gates and 180M bits of memory on one board

    GTX Debug I/O Connectors

    Each Virtex-7 2000T FPGA has 4 Gigabit Transceivers to one GTX debug I/O connector with a total of 16 Gigabit Transceivers in two GTX debug I/O connector for debug purpose on one board

    GTX I/O Connectors

    Each Virtex-7 2000T FPGA has 8 Gigabit Transceivers on one GTX I/O connector with a total of 32 Gigabit Transceivers on one board

    Advanced Clock Management

    Supports 14 global clocks from 2 oscillator sockets, 6 pairs of SMB clock inputs, 6 pairs of programmable clock sources and 6 pairs of feedback clocks from any of the four user FPGAs

  • Smart Power Monitors

    Monitor and automatically shut-down upon detection of over-current, over-voltage or over-temperature

    SD Card

    Stores 4 sets of FPGA configuration files into SD card and download one Virtex-7 2000 FPGA in 3 seconds

    Smart Power Monitors

    Monitor and automatically shut-down upon detection of over-current, over-voltage or over-temperature

    DDR3 SODIMM Socket

    Extends up to 8G bytes of external DDR3 memory

    DDR3 SODIMM Socket

    Extends up to 8G bytes of external DDR3 memory

    Powerful User I/Os

    120 Single-ended or LVDS I/Os. I/O Voltage individually adjustable connector-wise to 1.2V, 1.5V or 1.8V through software

    Powerful User I/Os

    120 Single-ended or LVDS I/Os. I/O Voltage individually adjustable connector-wise to 1.2V, 1.5V or 1.8V through software

    DDR3 SODIMM Socket

    Extends up to 8G bytes of external DDR3 memory

    DDR3 SODIMM Socket

    Extends up to 8G bytes of external DDR3 memory

    Smart Power Monitors

    Monitor and automatically shut-down upon detection of over-current, over-voltage or over-temperature

    Smart Power Monitors

    Monitor and automatically shut-down upon detection of over-current, over-voltage or over-temperature

    SD Card

    Stores 4 sets of FPGA configuration files into SD card and download one Virtex-7 2000 FPGA in 3 seconds

Back



The QuadE V7 TAI Logic Module uses four Xilinx Virtex-7 2000T FPGA devices and can hold designs up to 80M ASIC
gates. It has four on-board DDR3 SO-DIMM sockets to support up to 32GB DDR3 memory. The QuadE V7 also
supports 48 channels of high speed Gigabit transceivers capable of running up to 10Gbps for high-speed interfaces
such as PCIe, SATA and XAUI. And it has USB2.0 and Ethernet ports to support our Runtime Software which gives
you remote hardware control including FPGA download, programmable clock generation and self-test.

Large Capacity
   Up to 80M ASIC gates
   Up to 180Mbits of FPGA internal memory
   Four On-board DDR3 SO-DIMM sockets to support up to 32GB memory
   Can expand through the use of interconnection modules and/or mother board

High Speed Transceivers
    Each FPGA has 8 Gigabit Transceivers on a high speed differential connectors that can run up to
       10Gbps with total of 32 Gigabit Transceivers on 4 differential connectors
   Each FPGA has an additional 4 Gigabit Transceivers that are connected to 2 proprietary debug I/O
       connectors reserved for debug support
   Each FPGA has 2 Gigabit Transceivers interconnecting to the horizontally adjacent FPGA and 2 Gigabit
       Transceivers interconnecting to the vertically adjacent FPGA

Flexible & Powerful I/O
   360 dedicated I/O per FPGA with total of 1,440 dedicated I/O
   Each FPGA has 192 direct interconnection to every other FPGA
   Dedicated I/O voltage can be adjusted to 1.2V, 1.5V, 1.8V through runtime software in GUI

LVDS Pin-Multiplexing Interconnection Support
   Each FPGA has 80 pairs LVDS bus optimized for LVDS Pin-Multiplexing to all 3 other FPGAs
   Support 10,000+ design interconnections between any 2 FPGAs with LVDS bus running
      at 800MHz+
   On-board high-quality programmable LVDS Pin-Multiplexing clock source
   Dedicated LVDS Pin-Multiplexing reference clocks without consuming user resource and dedicated
      Reset button for initializing Pin-Multiplexing before user design starts
   Optional TAI Player Pro Compile software for automatic design partition

Advanced Global Clock & Reset Management
   14 global clocks can be selected from:
      · 6 pairs of programmable differential clock sources (0.2~700MHz)
      · 6 pairs of differential SMB clock inputs
      · 6 pairs of differential feedback clocks from any of the four user FPGA
      · 2 single-ended oscillator sockets
   Clocks are programed conveniently in S2C TAI Player runtime software
   1 global reset can be triggered from push-button, SMB inputs or from runtime Software
   4 global clocks can be programmed to be outputs through SMB connectors

High Performance
   Up to 60W power for each FPGA
   Equal trace length for I/Os from same I/O connector
   Pre-tested DDR3 memory speed up to 1600Mbps single rank and 1200Mbps dual rank

High Reliability
   Self-Tests – Isolate design issues from board issues conveniently with a software GUI
   Automatic shut-down upon detection of over-current, over-voltage or over-temperature
   Ample cooling mechanism with adjustable fan spead depending on FPGA temperature
   Separate power modules for each FPGA

 Ease-of-Use
   Remote reading/writing the on-board SD card
   Remote re-downloading FPGA designs
   Remote power recycle
   Remote assignments of I/O power-up sequence
   Multiple FPGA configuration options through Gigabit Ethernet Port, USB2.0 Port, JTAG and SD Card
   On-board battery charging circuit makes FPGA bin file encryption easy
   Each connector has 3 status LEDs to indicate I/O voltage
   Design Implementation – TAI Player Pro supports design partition across multiple FPGAs
   Design Debug – Set probes at the RTL level and bring the signals to the top level
   Use many off-the-shelf pre-tested daughter boards


 
All S2C V7 TAI Logic Modules are shipped with our state-of-the-art TAI Player Pro Runtime software.
You can exercise full control over the S2C TAI Logic Modules from Linux or Windows machines through the
USB or Ethernet ports without being a hardware expert.
     
 
          Control hardware through USB2.0 or Gigabit Ethernet ports
          Download designs to FPGA conveniently from TAI Player Pro software
          Make SD card for standalone FPGA download
          Run Self-Test for all I/O, interconnections and clocks
          Select global clock sources and program on-board programmable clock frequencies
          Reset hardware or re-download to FPGA remotely through software
          Monitor on-board voltage, current and temperature
          Read back on-board global clock frequencies
          Adjust I/O voltages through software
          Adjust fan speed settings through software


 
V7 TAI Logic Module now provides our popular FPGA I/O assignment tool for FREE. Instead of going through
datasheets and manually creating I/O assignment files for FPGA, users can now make I/O assignments in a
graphical user interface to save time and avoid errors.

 
 
  Map Daughter Boards  

The optional Full version of TAI Player Pro Compile & Debug Software dramatically reduces your SoC
prototyping effort particularly for designs that require partitioning across multiple FPGAs. With a
straightforward graphical user interface, you can perform prototype verification within a fraction of the
time it would take over a conventional design flow. TAI Player Pro encapsulates and works seamlessly
with Xilinx tool set and third party tools, including synthesis, place and route, and debug. RTL-level
probes are set up prior to synthesis step so that the signal names can be retained throughout the
compile flow even when designs are partitioned across multiple Virtex-7 FPGAs. For more Information,
please refer to TAI Player Pro Software section.
 





 
V7 TAI Logic Modules are designed with flexibility and reusability to easily extend a prototyping system for different
applications. Expandable dedicated I/Os , stackable shared I/Os and high-performance and reliable connectors
enable users to apply V7 TAI Logic Modules in various ways. Learn more about four major applications:
 With Daughter Board
   
Different SoC designs have different peripherals. The peripherals
can be designed as daughter boards to the V7 TAI Logic Module
thus the main FPGA boards are reusable to save cost.

S2C supplies a wide array of Prototype Ready Accessory Modules
to help you quickly build a comprehensive SoC prototype.
Click here to select the off-the-shelf daughter boards for your
prototyping system.
 With Mother Board
   

TAI Logic Modules can also be mounted on customized mother
boards to form more complicated system prototypes.

S2C provides services to build customized mother boards as well.
 
 Multiple V7 TAI Logic Module Stacked
   
V7 TAI Logic Modules can be Stacked or Tiled to expand the logic
capacity. S2C Global Clock and Reset Management Module can
be used to ensure global clock and reset distribution.
Co-Modeling
 
 
 
Expand your FPGA-based prototype usage by co-modeling with user’s verification
environment:
 
  Cycle-based Co-Simulation
Link simulators to the FPGA-based prototype for early block-level verification and simulation acceleration
of large designs through DPI and PLI Interfaces
  Transaction-Based Co-Modeling
Link with high-level design or test models such as C/C++/SystemC and achieve hundreds of kHz to MHz
  In-Circuit Co-Modeling
Create pseudo target interfaces at real time or near real-time speed. Access design registers and memories
which design is running in-circuit through AXI Bus protocol.
 

 
The V7 TAI Logic Module is available in below 6 module types, offering you a range of choices to best fit your design
needs. Refer to the following product table to select a suitable type to meet your design requirements. You can also
create your desired prototype configuration by stacking or tiling multiple TAI Logic Modules together and exceed the
80M logic gate capacity.



V7 TAI Logic Module Configuration Table
Product Type
QuadE
Quad
Dual
SingleE
SingleA
SingleB
Target Devices
4*7V2000T
4*7V2000T
2*7V2000T
1*7V2000T
1*7V2000T
1*7V2000T
ASIC Logic Gates
80M
80M
40M
20M
20M
20M
FPGA Memory
180Mbits
180Mbits
90Mbits
45Mbits
45Mbits
45Mbits
DDR3 SO-DIMM slot
4
2
1
1
1
-
DDR2 SO-DIMM slot
-
2
1
-
-
1
External User I/O
1,440
1,440
1,200
960
840
840
Inter-FPGA Nets
192*6
192*6
530
-
-
-
SerDes Transceivers
48GTX
48GTX
32GTX
16GTX
16GTX
16GTX
Remote Power Recycle
Available
-
-
Available
-
-