S2C’s V7 TAI Logic Module series use up to 9 Virtex-7 2000T devices on a single board to make SoC/ASIC prototyping a productive experience for designs of any size from 20 million up to 180 million ASIC gates. S2C has integrated Xilinx’s Vivado™ Design Suite in its prototype creation software flow and ChipScope™ Pro tools in its debug software for accelerated design productivity. In addition, the V7 TAI Logic Module hardware is designed to run high-frequency pin-multiplexing through LVDS interconnection bus to fit designs when partitioned to multiple FPGAs.

The V6 TAI Logic Module provides 15.2M ASIC gates for SoC prototyping by using 2 Xilinx Vertex-6 series FPGAs. The hardware can be assembled only one FPGA device to cut cost for small designs, or be stacked for very large scale designs. Our outstanding technology guarantee the FPGA runs at its maximum speed. Other features include downloading FPGA file through SD card, enhanced power management and noise shielding.

The S2C V6 TAI Verification Module (VM) provides three usage modes: Verification Mode, Debug Mode and Logic Mode. In Verification Mode, the V6 TAI VM enables the transfer of large amounts of data from/to a PC through a x4-lane PCIe Gen2 interface using SCE-MI or customizable C-API. In Debug Mode, the V6 TAI VM enables simultaneous debugging of multiple FPGAs using Xilinx ChipScope with user's RTL net names. In Logic Mode, the V6 TAI VM can prototype a design with capacity up to 4.7M gates and with a number of high-speed interfaces built on-board: USB3, SATA2, PCIe Gen2 and high-speed Serdes.

The Quad S4 TAI Logic Module is the latest addition to our 4th generation SoC/ASIC prototyping hardware that can fit designs up to 32.8M gates with four Altera Stratix IV 820E FPGAs on one board. Each FPGA has 480 I/O on 4 Logic Module connectors for a total of 1,920 I/O available on 16 connectors. The I/O voltage on each connector can be individually adjusted to 1.5/1.8/2.5/3.0V to interface to a variety of SoC interfaces at the same time. The Quad S4 TAI Logic Module features a 300 interconnect bus between the 4 FPGA for SoC bus architecture and additional interconnects are available through use of interconnection accessory modules. Users can easily download FPGAs, generate programmable clocks, and self-test hardware from S2C's TAI Player Runtime software via a straightforward USB2.0 interface.

The S4 TAI Verification Module can be used as a standalone prototyping board for smaller scale SoC or ASIC for up to 3.6M gate capacity. The S4 TAI Verification Module can mount either the Altera Stratix IV 180 or 360 GX FPGA and has a total of 480 external I/O on 4 LM connectors, 4 lane PCIe Gen2 Interface and 2 pairs of 10G Gigabit transceiver through SMA connectors.

The Virtex-5 TAI Logic Module provides up to 6.6M ASIC gates using the Xilinx Virtex-5 FPGA devices. Each module can provide up to 4GB of DDR2 memory running up to 667MHz. Multiple TAI Logic Modules can be stacked to meet higher-capacity design need. V5 TAI Logic Module is now shipping with S2C’s TAI Player Pro runtime software for USB-enabled FPGA download, 0.5 ~ 195 MHz clock generation, and self-test.

The S2C Virtex-4 TAI Logic Module is built for rapid SoC/ASIC prototyping using Xilinx Virtex-4 FPGA devices and support system design using TAI IP, a configurable FPGA-based IP format, to create designs in prototypes efficiently. The TAI Logic Module is designed to run at maximum FPGA speeds with all IOs brought out for optimal flexibility.