cJTAG offers more functionality using fewer pins, while maintaining full compatibility with existing IEEE 1149.1-based hardware and software. cJTAG Logic, available exclusively from IPextreme, is the industry’s first IEEE 1149.7-compliant synthesizable IP, providing a scalable, ready-to-integrate solution supporting all 6 classes of the IEEE 1149.7 standard. IEEE 1149.7 defines a next-generation Test Access Port (TAP), known as TAP.7, which extends IEEE 1149.1 TAP (TAP.1) functionality in several ways. Whereas IEEE 1149.1 was original developed as a solution for testing board-level interconnect, IEEE 1149.7 offers additional features to support increased chip integration, power management, application debug, and device programming.
Features
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- Supports IEEE 1149.7 classes 0–5 (selected through hardware configuration parameter)
- Partitioned along IEEE 1149.7-specified functional boundaries (so that only the required hardware is included):
- Extended Processing Unit (EPU) for class 0–3 operation
- Advanced Processing Unit (APU) for class 4–5 operation
- Further partitioning within EPU and APU for class-specific and optional features
- Separate blocks for clock and reset signal conditioning
- Supports all mandatory and optional scan formats: JScan0–3, SScan0–3, OScan0–7, and MScan
- Supports all mandatory and optional cJTAG commands
- Firewall provides robust hot-connection by disabling TCK until firewall is disabled by the Debug Test System (DTS)
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Block Diagram
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