TAI Compiler
TAI Compiler software creates ESL IP library in TAI IP format. The TAI IP libraries are used on TAI-compliant FPGA prototypes for FPGA-based ESL design that significantly reduce FPGA prototype creation time, enable secure IP evaluation and delivery without accessing the RTL source code, and perform system-level debugging without requiring detailed knowledge of internal IP functionality.
TAI Compiler is the ideal solution for IP providers who intend to send IP for IP users to evaluate or integrate without revealing the source code.
General Features:
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Compiles Verilog / VHDL to TAI IP |
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Pre-defines IP interface and internal properties such as IO, buses, and clocks |
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Pre-defines symbols and events to enable system-level debugging |
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Outputs TAI IP in TSDB (FPGA binary) and TDB (encrypted EDIF) formats |
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Produces SPIRIT XML IP description files |
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Intuitive graphical user interface (GUI) or TCK script mode |
Security Features for TAI IP Evaluation and Delivery:
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Non-reversible for SoC/ASIC layout |
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Password protected |
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Can only be run with the presence of TAI Pod module |
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Can be locked to designated TAI Pod |

Flow Control Graphic User Interface
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Input IP details for SPIRIT XML
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