S2C Limited.
S2C Limited.

Inauguration of SoCIP 2008 Seminar & Exhibition Showcasing Advanced SoC Design Solutions

Inauguration of SoCIP 2008 Seminar & Exhibition Showcasing Advanced SoC Design Solutions Sep 22, 2008

Shanghai, China – September 22, 2008—The first annual SoCIP 2008 Seminar and Exhibition will be held in Beijing on October 13th and Shanghai on October 15th, showcasing a range of system-on-chip (SoC) design techniques using commercial silicon intellectual properties (IP) as well as other advanced design solutions. SoCIP 2008 features seminar sessions and exhibition booths from seven global silicon IP and SoC design solution brand names: Cast, eASIC, IPextreme, Ittiam, S2C, Tensilica and Transwitch.

The inauguration of SoCIP event hopes to bring the most advanced SoC design knowhow to China in the years to come, as SoC design activities are growing rapidly in China and consequently IP demands are increasing at an accelerated pace. In view of this trend, the SoCIP event will focus on educating SoC designers/professionals on how to select and use commercial IP for their projects and improve on the quality, whilst lower their risk of failure. Through the encourage usage of commercial IP, SoC designers can achieve substantial cost saving and achieve a quicker speed-to-market strategy. This seminar intends to give greater awareness on various IP and give updates on the latest technology development in the IP and SoC design industry.

The SoCIP 2008 is organized by S2C, a leading total solution provider in facilitating systems to chip innovations. S2C develops and provides rapid SoC prototyping tools on field programmable gate array (FPGA) and carries a number of world-renowned commercial IP and SoC design solutions in China. Through the event, S2C hopes to bring together the regional SoC designers/professionals and the international silicon IP and SoC solution vendors. The event will be covered officially by EE Times Asia, one of the media sources by Global Sources.

"Adopting commercial Silicon IP for building next generation SoC is no longer just about saving development time," said Mr. Mon-Ren Chene, Chairman and CTO of S2C. "Electronic applications are changing so much faster these days that developing non value-added IP internally has made such effort becoming a liability rather than an asset for SoC design companies. In other words, internally developed IP need constant maintenance and updates to meet changing market demands and without continuous effort to maintain, the internally developed IP may become a cost rather than advantages for the company." Mr. Chene will continue to address the key design challenges that face SoC design industry in China at the welcome speech of the SoCIP 2008 seminar.

The SoCIP 2008 seminar sessions will be presented by several high-level executives from the distinguished IP and SoC design solution companies and will feature the latest IP technology updates as well as advanced SoC design techniques targeting not only the SoC designers but also the project managers as well as the corporate executives. Since seminar seats are free but limited only to 100 each at the Beijing and Shanghai event, pre-registration is a must and will only be available to guests that are pre-qualified. The SoCIP exhibition is open for on-site registration, however advanced registration through the internet is recommended.

The SoCIP 2008 event will be held at Wenjin International Hotel in Beijing on October 13th and at Parkyard Hotel in Pudong Shanghai on October 15th.

About S2C

Founded and headquartered in San Jose, California, S2C is the leading total solution provider in facilitating systems to chip innovations. S2C has four solutions for system-on-chip (SoC) development:

  • Rapid SoC prototyping on Field Programmable Gate Array (FPGA)

  • Third-party silicon intellectual properties (IP)

  • Customizable, zero mask-charge eASIC semiconductor devices

  • SoC design, prototype and production Servicess

S2C's value proposition is our highly qualified engineering team and customer-focused sales force that understands our customers' commercial needs in SoC development. S2C's unique FPGA-based electronic system level (ESL) solution, using our patented TAI IP technology, enables designers employ silicon IP to quickly assemble SoC prototypes on FPGA easily and securely, thereby enabling customers to start software development, typically the long pole item in development schedules, immediately. Combining rapid prototyping methodologies with a comprehensive portfolio of silicon IP and advanced design solutions, S2C can reduce the SoC design cycle by up to nine months.

S2C currently has 3 direct offices located in Shanghai, Beijing and Shenzhen to meet the demand for accelerated SoC design activities in China. S2C is also the organizer of the annual SoCIP seminar and exhibition in China, which brings SoC designers/professionals from the Asia-Pacific region together with international silicon IP and SoC solution vendors.

Back to list Back to list
Related S2C Complete Prototyping Solutions
Virtex UltraScale Series
S2C's Virtex UltraScale (VU) Prodigy Logic Systems are built on the Virtex UltraScale XCVU440 FPGA from Xilinx.
General Peripherals
GMII PHY Interface Module
Connector Connectivity
Prodigy Interconnection Module Type CConnects 144 GPIO and 4 SerDes between two Prodigy I/O connectors.The spacing between two connectors is 75mm.Available TypesReference ClockP-PM-IMCFixed 100MHzP-PM...
What's New at S2C
Request for Quote
What type of chip are you designing
What is the capacity of the ASIC gate included in the design?
5 million-20 million
20 million-50 million
50 million-100 million
100 million-1 billion
More than 1 billion
Which FPGA do you prefer to use?
Xilinx VU440
Xilinx KU115
Xilinx VU19P
Xilinx VU13P
Xilinx VU9P
Intel S10-10M
Intel S10-2800
Not sure, need professional advice
What kind of FPGA configuration do you need?
Single FPGA
Four FPGAs
Eight FPGAs
Not sure, need professional advice
What kind of peripheral interface do you need?
How many prototype verification platforms do you need?
Do you need the following tools?
Segmentation tool
Multiple FPGA debugging tools
Co-modeling tool (allows large amounts of data to interact between FPGA and PC host)
When do you need to use our products?
0-6 months
6-12 months
More than 12 months
Not sure
Any additional comments?