S2C Limited.
S2C Limited.
Products
S2C Prodigy Multi-Debug Module Pro

Multi-Debug Module Pro

The S2C Prodigy Multi-Debug Module is an innovative debug solution for FPGA prototyping. It has the ability to run deep-trace debugging on multiple FPGAs simultaneously. It can trace up-to 32K signals per FPGA in 8 groups of 4K signals each without re-compiling, and can store 8GB of waveform data without consuming user memories.

Highlights of Multi-Debug Module Pro


  • Debug across up to 8 FPGAs simultaneously using a single logic analyzer

  • Faster sampling rate of up to 125MHz

  • Trace up to 2K probes per FPGA and support 8 sample groups

  • Easy get the value of any internal DFF/BRAM

  • Supports trigger state machine languages to ease the debugging

  • Store up to 64GB of waveform data externally


Highlights of Multi-Debug Module Pro

Specifications of Multi-Debug Module Pro


Hardware Support

  • VU19P LS, VU440 LS, LX1


OS Support

  • Windows 7/10 64-bit

  • Red Hat Enterprise Linux 6.6/7.6 64-bit

  • Ubuntu Linux 14.04/16.04 64-bit

  • CentOS 7.4 64-bit


Language Support

  • Verilog / VHDL

  • System Verilog

  • EDIF

  • Mixed languages

Learn more about Multi-Debug Module Pro

S2C Announces MDM Pro to Simplify and Speed Up FPGA Prototyping Debug Process

Prodigy Multi-Debug Module has been helping FPGA prototyping customers to shorten the debug process and get their designs to market quickly with greater confidence.


What's the advantage of MDM Pro?

MDM Pro combines off-FPGA hardware for “deep” trace-data storage and complex hardware trigger logic, in combination with probe multiplexing IP in the FPGA to access a large number of debug probes over a few FPGA high-speed GTY connections to minimize the consumption of FPGA I/O, and the ability to setup more probe connections than need to be viewed at the same time so that more probes may be viewed when needed without recompiling the FPGA or degrading the debug performance.


MDM Pro —— Deeper, Faster and Versatile

MDM Pro now offers two modes of operations to further enhance flexibility and productivity. The traditional Compile mode works with Player Pro cockpit to specify debug nodes and trigger condition. In the new IP mode, users can directly instantiate the debug IP in the DUT design and bypass the Player Pro setup.


Advanced SoC debug with multi-FPGA prototyping

Today's SoC design debug tools for FPGA prototyping are less than ideal, and multi-FPGA prototyping adds to the challenge of implementing the capabilities of an ideal SoC design debug tool. Get the latest insights into advanced SoC debugging with S2C's whitepaper on multi-FPGA prototyping.


Paving the Way to Digital Innovation
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Request for Quote
What type of chip are you designing
What is the capacity of the ASIC gate included in the design?
5 million-20 million
20 million-50 million
50 million-100 million
100 million-1 billion
More than 1 billion
Which FPGA do you prefer to use?
Xilinx VU440
Xilinx KU115
Xilinx VU19P
Xilinx VU13P
Xilinx VU9P
Intel S10-10M
Intel S10-2800
Not sure, need professional advice
What kind of FPGA configuration do you need?
Single FPGA
Dual FPGA
Four FPGAs
Eight FPGAs
Not sure, need professional advice
What kind of peripheral interface do you need?
How many prototype verification platforms do you need?
Do you need the following tools?
Segmentation tool
Multiple FPGA debugging tools
Co-modeling tool (allows large amounts of data to interact between FPGA and PC host)
When do you need to use our products?
0-6 months
6-12 months
More than 12 months
Not sure
Any additional comments?