The S2C Prodigy Multi-Debug Module is an innovative debug solution for FPGA prototyping. The S2C multi-debug has the ability to run deep-trace debugging on multiple FPGAs simultaneously. Multi-FPGA Debugging can trace up-to 32K signals per FPGA in 8 groups of 4K signals each without re-compiling, and can store 8GB of waveform data without consuming user memories.
Debug across up to 8 FPGAs simultaneously using a single logic analyzer
Faster sampling rate of up to 125MHz
Trace up to 2K probes per FPGA and support 8 sample groups
Easy get the value of any internal DFF/BRAM
Supports trigger state machine languages to ease the debugging
Store up to 64GB of waveform data externally
VU19P LS, VU440 LS, LX1
Windows 7/10 64-bit
Red Hat Enterprise Linux 6.6/7.6 64-bit
Ubuntu Linux 14.04/16.04 64-bit
CentOS 7.4 64-bit
Verilog / VHDL
Prodigy Multi-Debug Module has been helping FPGA prototyping customers to shorten the debug process and get their designs to market quickly with greater confidence.
MDM Pro combines off-FPGA hardware for “deep” trace-data storage and complex hardware trigger logic, in combination with probe multiplexing IP in the FPGA to access a large number of debug probes over a few FPGA high-speed GTY connections to minimize the consumption of FPGA I/O, and the ability to setup more probe connections than need to be viewed at the same time so that more probes may be viewed when needed without recompiling the FPGA or degrading the debug performance.
MDM Pro now offers two modes of operations to further enhance flexibility and productivity. The traditional Compile mode works with Player Pro cockpit to specify debug nodes and trigger condition. In the new IP mode, users can directly instantiate the debug IP in the DUT design and bypass the Player Pro setup.
Today's SoC design debug tools for FPGA prototyping are less than ideal, and multi-FPGA prototyping adds to the challenge of implementing the capabilities of an ideal SoC design debug tool. Get the latest insights into advanced SoC debugging with S2C's whitepaper on multi-FPGA prototyping.