S2C Webinar-Debugging Techniques for FPGA Prototyping

Webinar: Debugging Techniques for FPGA Prototyping

Already familiar with FPGA debugging? How would it apply to FPGA prototyping, especially over multiple FPGAs? Find out what #S2C has to offer in this 8-minute video.

• Time: Octotber 09, 2021 (CST)

• Location: Online

Details about Webinar:

• Basic debugging techniques such as VIO IP & Source/Probes Editor are available from FPGA vendors

• Internal/Embedded Logic Analyzer available in Vivado/Quartus

  -Only support single FPGA debug and consumes FPGA resources

• S2C offers additional FPGA prototyping debugging approaches to increase your high productivity

  -Basic IO, UARTs and Virtual IOs -ProtoBridge to offer high bandwidth AXI connectivity over PCIe

  -NT Bus to offer mid bandwidth connectivity AXI over Ethernet

  -MDM Pro to provide concurrent data sampling over multiple FPGAs

  -Over 90+ daughter cards to support in-system testing and protocol connectivity