S2C.
S2C.

ChipStart Selects S2C to Facilitate Prototyping ChipStart's SoC System Management Options

ChipStart Selects S2C to Facilitate Prototyping ChipStart's SoC System Management Options May 31, 2015

Availability of SSM on S2C's TAI Logic Module Enables Faster SoC Prototype Development

Palo Alto, California, May 31, 2011 - ChipStart LLC, a semiconductor intellectual property solution company, announced today it has selected S2C, Inc. as a target vendor for prototyping and low volume deployment of ChipStart's SSM SoC System Manager.


Today's SoCs often include multiple processors and other high functionality hardware blocks supplied by multiple internal and external sources.  Each one of these blocks has unique system management requirements, such as reset and boot sequencing, as well as power and security management.  SSM enables system management functions to be abstracted and centrally controlled using software. The  SSM controller accepts software based command sequences in real time and communicates with each of the IP blocks via a simple SSM bus. This bus is represented as a ring, is easy to implement, and can operate across multiple clock domains.  A small SSM register block is connected to each IP block to facilitate mapping the software based commands into specific signal transitions communicated to each of the hardware blocks over the SSM bus.


"For certain applications, such as communications appliances, personalizing the SoC happens more frequently and this can cause a lot of design and test complexity at the system level. In these cases there are economic advantages to having a small FPGA next to the SoC which hosts the SSM controller, rather than incorporating the entire SSM architecture into the SoC." said Howard Pakosh, president and CEO ChipStart LLC. Certainly this is the case when prototyping systems management schemes for the first time, but this solution can also offer more flexibility for real time personalization of several ASICs at the board level after the appliances have been shipped into the field"


ChipStart is offering SSM on the S2C Single Virtex-5  110 TAI Logic Module.  This logic module is designed for rapid  SoC/ASIC prototyping and can hold designs with up to 1.1M ASIC gates.  This design can be ported to higher capacity  S2C prototyping boards.


“ Combining IP subsystems such a SSM with flexible prototyping vehicles such as Virtex-5 not only accelerates architecture development but also delivers the predictable system behavior early in the SoC design cycle that shaves months off of a typical time to market schedule.  By controlling the system state transitions using a software scheme, developing and debugging software on the target hardware is much more efficient than traditional approaches.” said Toshio Nakama, CEO of S2C.

SoC System Management is rapidly becoming one of the most difficult and expensive design challenges for SoC developers. The proliferation of applications, such as Facebook, Twitter, and YouTube across appliances is re-oriented user expectations of having the same experience across all their appliances, whether it be a cell phone, Internet TV, laptop or tablet computers. As a result, SoC developers are now faced with the challenge of building SoC "platforms" that must comprehend uniform user experience requirements, even if their target SoC is vertically aligned.


"The dynamics of a consistent user experience any where and on any appliance means that SoCs targeted for a specific appliance must in some way comprehend how the application will be executed on other appliances." Said Rich Wawryzniak, Senior Analyst, Semico Research. “ Adding personalization through real time programmability into the SoC is now a necessity, and incorporating subsystem IP SoC methodologies that includes SoC system management delivers superior business economics&rdquo.


SSM is the only merchant SoC Subsystem Management IP available today. SSM provides power and security management, error recovery, boot and reset sequencing, using a software based sequencing methodology that is effective for normal operation sequences and exception handling and can transition the as applications are selected by the end user.



About S2C


S2C's value proposition is our highly qualified engineering team and customer-focused sales force that understands our customers’ commercial SoC development needs. S2C's unique FPGA-based electronic system level (ESL) solution, using our patented TAI IP technology, enables designers to quickly assemble FPGA-based SoC prototypes on S2C FPGA boards.  This gives customers an early start on software development, typically the long pole item in development schedules. Combining rapid prototyping methodologies with a comprehensive portfolio of Prototype Ready™ IP and advanced design solutions, S2C can greatly reduce the SoC design cycle.

Back to list Back to list
Related S2C Complete Prototyping Solutions
High Speed MCIO Peripherals
8-Lane PCIe Root Complex MCIO ModuleProvides one x16 PCIe Slot, only support 8 lanesProvides one 100MHz reference clockProvides 3 LEDs and 1 Push ButtonsOccupies two MCIO connectorsMCIO to PGT Convert...
Prodigy Logic Matrix
High Performance and HighDensity Prototyping
Prodigy S7 Series (Virtex UltraScale+)
The 7th generation SoC/ASIC prototyping solution from S2C, the Prodigy S7 series Logic System, is equipped with AMD's(Xilinx)Virtex UltraScale+™ FPGA. The Prodigy Logic System are supported by S2C'...
What's New at S2C
Request for Quote
What type of chip are you designing
What is the capacity of the ASIC gate included in the design?
5 million-20 million
20 million-50 million
50 million-100 million
100 million-1 billion
More than 1 billion
Which FPGA do you prefer to use?
Xilinx VU440
Xilinx KU115
Xilinx VU19P
Xilinx VU13P
Xilinx VU9P
Intel S10-10M
Intel S10-2800
Not sure, need professional advice
What kind of FPGA configuration do you need?
Single FPGA
Dual FPGA
Four FPGAs
Eight FPGAs
Not sure, need professional advice
What kind of peripheral interface do you need?
How many prototype verification platforms do you need?
Do you need the following tools?
Segmentation tool
Multiple FPGA debugging tools
Co-modeling tool (allows large amounts of data to interact between FPGA and PC host)
When do you need to use our products?
0-6 months
6-12 months
More than 12 months
Not sure
Any additional comments?