Founded in 2003, TAKUMI licenses out its unique and OpenGL ES- and OpenVG-compliant Graphics Accelerator IP cores for embedded systems and mobile information devices, including digital still/video cameras, mobile phones and set-top boxes that enable the smallest size and power consumption as well as real rich 2D/3D intuitive user interface around the world. The company maintains its headquarters in Shiba, Tokyo. TAKUMI also has offices in Kofu, Yamanashi.
"Graphics IPs today are very complex and require a large number of test patterns to perform the complete hardware verification and software testing. Thus, a reliable, flexible and high-performance FPGA platform is required," said Hiroyuki Nitta, Executive Director of Research and Development of TAKUMI Corporation.
In addition, SoC designers who are planning to integrate a complex IP core, such as TAKUMI's 3D graphics IP, often require a tremendous amount of verification effort such as verifying the correctness of all hardware functions, evaluating SoC bus efficiency and testing software compatibilities. Therefore, having an easy-to-use and scalable rapid FPGA-based prototyping platform with TAKUMI's 3D Graphics IP core already verified on the platform would certainly ease the integration of end SoC.
"We mapped our 3D graphics IP core into a Virtex-6 760 FPGA on S2C's V6 TAI Logic Module and used S2C's DVI-ver2.0 daughter card to display the video on a TV. To control our graphics IP core, we utilized an off-the-shelf ARM11 CPU board (ARMADILLO-500) and Japan Circuit, S2C's partner in Japan, custom-made an interface board so the ARM11 CPU board can be plugged on top of S2C's V6 TAI Logic Module," said Makoto Natori, Group Manager of IP Core Development Group.
"Once we got the basic function of our first graphics IP core working on V6 TAI Logic Module, we expanded the hardware design to integrate more functions as there are still plenty of room in FPGA for additional logic verification. Then, we substituted the FPGA design with different models of our graphics IP cores so all of them were verified. We were able to test a lot of software on all the different graphics IP cores as we were able to run our FPGA design on the TAI Logic Module at close to real system speed."
S2C's rapid SoC prototyping solutions are known for their reliability, interface flexibility to a variety of SoC models and interfaces, and scalability to support designs of various gate counts
Large-capacity and high stability enable TAKUMI to run all the different test patterns at high speed
The quick response of S2C's support team helped TAKUMI to bring up their FPGA verification environment successfully
Using S2C's rapid SoC prototyping solutions, TAKUMI's Graphics IP cores were prototyped and are available as reference designs today on S2C's Virtex-6 760 TAI Logic Modules for customers to integrate into their SoC. TAKUMI Graphics IP core reference designs can also be easily ported to the new Virtex-7 2000T TAI Logic Module series or the Altera Stratix-4 820 TAI Logic Module series upon customer requests.
"Once we got the basic function of our first graphics lP core working on V6 TAl Logic Module,we expanded the hardware design to integrate more functions asthere ar still plentyof room in FPGA for additional logic verfication. Then, we substituted the FPGA design with difrent models of our graphics lP cores soallofthem were verified."
"Welook forward to builda long-term cooperation with 2C and await 2C to provide even more complete and convenient CPlU development kit as welapplications notes in that area."