DVCon Japan 2026

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DVCON Japan 2026

The Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this highly technical conference is on the practical aspects of these technologies and their use in leading-edge projects to encourage attendees to adopt similar techniques to improve their own design and verification flows.

Time: 2026.09.10
Location：Pacifico Yokohama North
Booth: TBD

For more information, please visit: www.s2cinc.com

Event Contact

Andrew Wu

MARCOM Specialist

S2C

Email: marketing@s2ceda.com

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References

Request for Quote

What type of chip are you designing

What is the capacity of the ASIC gate included in the design?

5 million-20 million

20 million-50 million

50 million-100 million

100 million-1 billion

More than 1 billion

Which FPGA do you prefer to use?

Xilinx VU440

Xilinx KU115

Xilinx VU19P

Xilinx VU13P

Xilinx VU9P

AMD VP1802

AMD VP1902

Intel S10-10M

Intel S10-2800

Not sure, need professional advice

What kind of FPGA configuration do you need?

Single FPGA

Dual FPGA

Four FPGAs

Eight FPGAs

Not sure, need professional advice

What kind of peripheral interface do you need?

How many prototype verification platforms do you need?

Do you need the following tools?

Segmentation tool

Multiple FPGA debugging tools

Co-modeling tool (allows large amounts of data to interact between FPGA and PC host)

When do you need to use our products?

0-6 months

6-12 months

More than 12 months

Not sure

Any additional comments?