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FPGA-based Prototyping of AXI-based Designs: Ideal Solution for Block-Level and Algorithm Development | ARM

FPGA-based Prototyping of AXI-based Designs: Ideal Solution for Block-Level and Algorithm Development | ARM Jan 27, 2015
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    Rob van Blommestein, S2C Inc.  1/27/2015 06:14 ARM Processors


    In an effort to make FPGA-based prototyping available to any engineer,S2C is offering its popular ProtoBridge AXI FPGA-accelerated verification tool along with its Virtex 7 SingleE and Kintex 7 Logic Modules for a limited time at an accessible price entry point. 


    Protobridge AXI enables designers to read and write data from computers to AXI-based designs mapped to FPGA-based prototypes. By utilizing a rich set of C subroutine calls, ProtoBridge AXI users can easily implement algorithm validation, block-level prototyping, full-chip simulation acceleration, corner case testing and early SoC software development.


    ProtoBridge AXI consists of a computer software component and a FPGA design component. The computer software component contains Linux/Windows drivers and a set of C-API/DPI routines to perform AXI transactions. The FPGA design component contains a PCIe, an interconnection module and AXI transactors to be instantiated in users’ design-under-test (DUT). With these enhanced product features, users can read and write at speeds of up to 500 megabytes per second through the PCIe interface, connect 16 Master devices and 16 Slave devices on the AXI bus, and take advantage of the patent pending Shared Memory technology that link the FPGA prototype with third party design tools.



    Virtex 7 SingleE Logic Module


    The S2C SingleE V7 Logic Module is the industry’s smallest form-factor (260mm X 170mm), all-purpose, stand-alone prototyping system based on Xilinx‘s Virtex-7 2000T FPGA. The system utilizes S2C‘s 5th generation technology, can handle up to 20M gate designs and features:


    960 I/Os on 8 high-speed connectors

    Access to a library of over 70 daughter cards for quickly building a prototype target

    On-board DDR3 SO-DIMM socket extending to 8 GB of memory running at 1600MB/s

    Remote control management through Ethernet and USB for programmable clock generations, design resets, virtual I/Os and switches, I/O voltage setting, and monitoring of voltage/current/temperature and read back hardware status

    Multiple SingleE V7 Logic Module management from one PC

     


    Kintex 7 Logic Module


    The K7 Logic Module features the largest number of user I/Os in its class with 432 I/Os on four Dedicated I/O connectors and 16 channels of GTX transceivers on two Differential I/O connectors. The GTX transceivers are capable of running up to 10Gbps with -2 grade FPGA devices. Users can easily download to FPGAs, generate programmable clocks, adjust I/O voltages and run self-test on hardware from S2C’s TAI Player Runtime software via a straightforward USB2.0 interface. With S2C K7 TAI Logic Module‘s affordable pricing, project managers can deploy large number of FPGA-based prototypes to accelerate hardware verification and software development in parallel.



    Ideal Solution for Block-Level and Algorithm Development


    Coupled with S2C’s ProtoBridge™ software that accelerates FPGA verification using co-modeling technology, the SingleE V7, and Kintex 7 Logic Modules are the perfect platform for IP and algorithm creation. Engineers are able to leverage the strengths of system-level simulation and RTL-level design accuracy, shorten design and verification time, and ensure higher product quality through improved test coverage.


    Designers can achieve these goals with the ability to


    Link FPGA prototyping to ESL simulations for model availability and accuracy

    • Validate SoC software on the target architecture and design algorithm in real hardware

    • Read/write data at speeds of up to 500MB/second data through the PCIe Gen2 interface from computers to AXI-based designs mapped to the logic module

    • Create corner test cases in software and run exercises on the prototype

    • Run regression tests on their FPGA prototype utilizing vectors stored in the host computer

     

    To learn more about these bundled solutions, please visit Rapid FPGA-based SoC & ASIC Prototyping - S2C.

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